Current Issue : October-December Volume : 2021 Issue Number : 4 Articles : 5 Articles
Due to the complex behavior of a multiscroll chaotic system, it is a good candidate for the secure communications. In this paper, by adding an additional variable to the modified Lorenz-type system, a new chaotic system that includes only linear and piecewise items but can generate 4n + 4 scroll chaotic attractors via choosing the various values of natural number n is proposed. Its dynamics including bifurcation, multistability, and symmetric coexisting attractors, as well as various chaotic and periodic behaviors, are analyzed by means of attraction basin, bifurcation diagram, dynamic map, phase portrait, Lyapunov exponent spectrum, and C0 complexity in detail. )e mechanism of the occurrence for generating multiscroll chaotic attractors is presented. Finally, this multiscroll chaotic system is implemented by using the Altera Cyclone IV EP4CE10F17C8 FPGA. It is found that this FPGA-based design has an advantage of requiring less resources for 0% of the embedded multipliers and 0% of the PLLs of this FPGA are occupied....
In this paper, an FPGA-based convolutional neural network coprocessor is proposed. The coprocessor has a 1D convolutional computation unit PE in row stationary (RS) streaming mode and a 3D convolutional computation unit PE chain in pulsating array structure. The coprocessor can flexibly control the number of PE array openings according to the number of output channels of the convolutional layer. In this paper, we design a storage system with multilevel cache, and the global cache uses multiple broadcasts to distribute data to local caches and propose an image segmentation method that is compatible with the hardware architecture. The proposed coprocessor implements the convolutional and pooling layers of the VGG16 neural network model, in which the activation value, weight value, and bias value are quantized using 16-bit fixed-point quantization, with a peak computational performance of 316.0 GOP/s and an average computational performance of 62.54 GOP/s at a clock frequency of 200MHz and a power consumption of about 9.25 W....
User authentication for accurate biometric systems is becoming necessary in modern real-world applications. Authentication systems based on biometric identifiers such as faces and fingerprints are being applied in a variety of fields in preference over existing password input methods. Face imaging is the most widely used biometric identifier because the registration and authentication process is noncontact and concise. However, it is comparatively easy to acquire face images using SNS, etc., and there is a problem of forgery via photos and videos. To solve this problem, much research on face spoofing detection has been conducted. In this paper, we propose a method for face spoofing detection based on convolution neural networks using the color and texture information of face images. +e color-texture information combined with luminance and color difference channels is analyzed using a local binary pattern descriptor. Color-texture information is analyzed using the Cb, S, and V bands in the color spaces. +e CASIA-FASD dataset was used to verify the proposed scheme. +e proposed scheme showed better performance than state-of-the-art methods developed in previous studies. Considering the AI FPGA board, the performance of existing methods was evaluated and compared with the method proposed herein. Based on these results, it was confirmed that the proposed method can be effectively implemented in edge environments....
+e performance of time-domain channel estimation deteriorates due to the presence of Gaussian mixture model (GMM) noise, which results in high mean squared error (MSE) as a challenging issue. +e performance of the estimator further decreases when the complexity of the estimator is high due to the high convergence rate. In this paper, an optimized channel estimation method is proposed with low complexity and high accuracy in theGMMenvironment. In this channel estimation, an improved Gauss-Seidel iterative method is utilized with a minimum number of iterations. +e convergence rate of the Gauss-Seidel method is improved by estimating an appropriate initial guess value when no guard bands are used in the orthogonal frequency-division multiplexing (OFDM) symbol. Simulation results provide an acceptable MSE for GMM environments, up to the probability of 5% impulsive noise component. +is paper also presents the design and implementation of the proposed estimator in the NEXYS-2 FPGA platform that provides resources allocation, reconfigurability, schematic, and the timing diagram for detailed insight....
With the development of the economy and society, the demand for social security and stability increases. However, traditional security systems rely too much on human resources and are affected by uncontrollable community security factors. An intelligent security monitoring system can overcome the limitations of traditional systems and save human resources, contributing to public security. To build this system, a RISC-V SoC is first designed in this paper and implemented on the Nexys-Video Artix-7 FPGA. Then, the Linux operating system is transplanted and successfully run. Meanwhile, the driver of related hardware devices is designed independently. After that, three OpenCV-based object detection models including YOLO (You Only Look Once), Haar (Haar-like features), and LBP (Local Binary Pattern) are compared, and the LBP model is chosen to design applications. Finally, the processing speed of 1.25 s per frame is realized to detect and track moving objects. To sum up, we build an intelligent security monitoring system with real-time detection, tracking, and identification functions through hardware and software collaborative design. This paper also proposes a video downsampling technique. Based on this technique, the BRAM resource usage on the hardware side is reduced by 50% and the amount of pixel data that needs to be processed on the software side is reduced by 75%. A video downsampling technology is also proposed in this paper to achieve better video display effects under limited hardware resources. It provides conditions for future function expansion and improves the models..................
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